An electronic device comprises circuitry to generate and authenticate a first write protect (WP) signal; a controller to write data to a memory, the controller to generate a second WP signal; and a logic gate coupled to the circuitry and the controller. The logic gate is to receive the first and second WP signals; generate a third WP signal based on the first and second WP signals; and assert the third WP signal to the memory to control a write enable state of the memory.