- 专利标题: MOLDED SEMICONDUCTOR PACKAGE WITH HIGH VOLTAGE ISOLATION
-
申请号: US17746306申请日: 2022-05-17
-
公开(公告)号: US20220278060A1公开(公告)日: 2022-09-01
- 发明人: Shao Ping Wan , Eric Brion Acquitan , Dexter Reynoso , Jürgen Schredl , Woon Yik Yong
- 申请人: Infineon Technologies AG
- 申请人地址: DE Neubiberg
- 专利权人: Infineon Technologies AG
- 当前专利权人: Infineon Technologies AG
- 当前专利权人地址: DE Neubiberg
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L21/56 ; H01L23/31
摘要:
A molded semiconductor package includes: a semiconductor die attached to a substrate, the semiconductor die having a bond pad at a first side of the semiconductor die which faces away from the substrate and an insulating layer covering the first side; an electrical conductor attached to a part of the bond pad exposed by an opening in the insulating layer; a mold compound encasing the semiconductor die; and an electrically insulative material filling the opening in the insulating layer and sealing the part of the bond pad exposed by the opening in the insulating layer. The electrically insulative material separates the mold compound from the part of the bond pad exposed by the opening in the insulating layer. A corresponding method of producing the molded semiconductor package also is described.
公开/授权文献
- US11817407B2 Molded semiconductor package with high voltage isolation 公开/授权日:2023-11-14
信息查询
IPC分类: