Systems, methods and apparatus are provided for an array of vertically stacked memory cells having horizontally oriented access devices and access lines, and shared vertically oriented digit line. The access devices having a first source/drain region and a second source drain region separated by a channel region, and gates opposing the channel region. Horizontal oriented access lines are coupled to the gates and separated from a channel region by a gate dielectric. The memory cells have horizontally oriented storage nodes coupled to the second source/drain region of the horizontally oriented access devices. The shared, vertically oriented digit line is shared between two neighboring horizontal access devices and is coupled to the first source/drain regions of the two neighboring horizontally oriented access devices.