Invention Application
- Patent Title: Wiring Trace Morphology Structure for High Speed Applications
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Application No.: US17230774Application Date: 2021-04-14
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Publication No.: US20220336342A1Publication Date: 2022-10-20
- Inventor: Zheng Zhou , Jun Chung Hsu
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01Q1/22 ; H01L23/66

Abstract:
Routing substrates, methods of manufacture, and electronic assemblies including routing substrates are described. In an embodiment, a routing substrate includes a metal routing layer including a first set of first wiring traces and a second set of second wiring traces, where first top surfaces of the first wiring traces are characterized by a lower RMS surface roughness (Rq) than the second top surfaces of the second wiring traces.
Information query
IPC分类: