Invention Application
- Patent Title: LOW RESISTANCE INTERCONNECT STRUCTURE FOR SEMICONDUCTOR DEVICE
-
Application No.: US17871532Application Date: 2022-07-22
-
Publication No.: US20220359372A1Publication Date: 2022-11-10
- Inventor: Jason HUANG , Liang-Chor CHUNG , Cheng-Yuan LI
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L21/768 ; H01L21/02 ; H01L21/285

Abstract:
The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.
Public/Granted literature
- US12199036B2 Low resistance interconnect structure for semiconductor device Public/Granted day:2025-01-14
Information query
IPC分类: