Invention Application
- Patent Title: SOURCE/DRAIN EPITAXIAL LAYER PROFILE
-
Application No.: US17815063Application Date: 2022-07-26
-
Publication No.: US20220359751A1Publication Date: 2022-11-10
- Inventor: Gulbagh SINGH , Hsin-Chi CHEN , Kun-Tsang CHUANG
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/762 ; H01L21/02 ; H01L21/3065 ; H01L21/265

Abstract:
The present disclosure describes a method that mitigates the formation of facets in source/drain silicon germanium (SiGe) epitaxial layers. The method includes forming an isolation region around a semiconductor layer and a gate structure partially over the semiconductor layer and the isolation region. Disposing first photoresist structures over the gate structure, a portion of the isolation region, and a portion of the semiconductor layer and doping, with germanium (Ge), exposed portions of the semiconductor layer and exposed portions of the isolation region to form Ge-doped regions that extend from the semiconductor layer to the isolation region. The method further includes disposing second photoresist structures over the isolation region and etching exposed Ge-doped regions in the semiconductor layer to form openings, where the openings include at least one common sidewall with the Ge-doped regions in the isolation region. Finally the method includes growing a SiGe epitaxial stack in the openings.
Public/Granted literature
- US11942547B2 Source/drain epitaxial layer profile Public/Granted day:2024-03-26
Information query
IPC分类: