Invention Application
- Patent Title: MEMORY CIRCUIT USING OXIDE SEMICONDUCTOR
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Application No.: US17618993Application Date: 2020-06-09
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Publication No.: US20220366958A1Publication Date: 2022-11-17
- Inventor: Fumika AKASAWA , Munehiro KOZUMA
- Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Current Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Priority: JP2019-115553 20190621
- International Application: PCT/IB2020/055394 WO 20200609
- Main IPC: G11C11/405
- IPC: G11C11/405 ; H01L27/108 ; H01L27/12 ; H01L29/786

Abstract:
Since power source voltages are different depending on circuits used for devices, a circuit for outputting at least two or more power sources is additionally prepared. An object is to unify outputs of the power source voltages. A transistor using an oxide semiconductor is provided in such a manner that electrical charge is retained in a node where the transistor and a capacitor are electrically connected to each other, a reset signal is applied to a gate of the transistor to switch the states of the transistor from off to on, and the node is reset when the transistor is on. A circuit configuration that generates and utilizes a potential higher than or equal to a potential of a single power source can be achieved.
Public/Granted literature
- US11996133B2 Memory circuit using oxide semiconductor Public/Granted day:2024-05-28
Information query
IPC分类: