Invention Application
- Patent Title: Semiconductor Device and Method
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Application No.: US17869462Application Date: 2022-07-20
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Publication No.: US20220367263A1Publication Date: 2022-11-17
- Inventor: Chung-Chiang Wu , Hsueh Wen Tsau , Chia-Ching Lee , Cheng-Lung Hung , Ching-Hwanq Su
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L29/66 ; H01L23/532 ; H01L29/78 ; H01L23/535

Abstract:
A method includes forming an opening in a dielectric layer, depositing a seed layer in the opening, wherein first portions of the seed layer have a first concentration of impurities, exposing the first portions of the seed layer to a plasma, wherein after exposure to the plasma the first portions have a second concentration of impurities that is less than the first concentration of impurities, and filling the opening with a conductive material to form a conductive feature. In an embodiment, the seed layer includes tungsten, and the conductive material includes tungsten. In an embodiment, the impurities include boron.
Public/Granted literature
- US11769694B2 Contact plug with impurity variation Public/Granted day:2023-09-26
Information query
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