Invention Application
- Patent Title: BUILD-UP PACKAGE FOR INTEGRATED CIRCUIT DEVICES, AND METHODS OF MAKING SAME
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Application No.: US17843799Application Date: 2022-06-17
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Publication No.: US20230005802A1Publication Date: 2023-01-05
- Inventor: Hong Wan Ng , Choon Kuan Lee , David J. Corisis , Chin Hui Chong
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: H01L23/18
- IPC: H01L23/18 ; H01L23/00 ; H01L23/373 ; H01L23/31 ; H01L21/56 ; H01L21/78

Abstract:
A device is disclosed which includes, in one illustrative example, an integrated circuit die having an active surface and a molded body extending around a perimeter of the die, the molded body having lips that are positioned above a portion of the active surface of the die. Another illustrative example includes an integrated circuit die having an active surface, a molded body extending around a perimeter of the die and a CTE buffer material formed around at least a portion of the perimeter of the die adjacent the active surface of the die, wherein the CTE buffer material is positioned between a portion of the die and a portion of the molded body and wherein the CTE buffer material has a coefficient of thermal expansion that is intermediate a coefficient of thermal expansion for the die and a coefficient of thermal expansion for the molded body.
Information query
IPC分类: