Invention Publication
- Patent Title: METHOD FOR MANAGING A MEMORY IN A SYSTEM-ON-A-CHIP
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Application No.: US18058613Application Date: 2022-11-23
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Publication No.: US20230161486A1Publication Date: 2023-05-25
- Inventor: Loic Pallardy , Michel Jaouen
- Applicant: STMicroelectronics (Grand Ouest)SAS
- Applicant Address: FR Le Mans
- Assignee: STMicroelectronics (Grand Ouest)SAS
- Current Assignee: STMicroelectronics (Grand Ouest)SAS
- Current Assignee Address: FR Le Mans
- Priority: FR 12499 2021.11.25
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
In accordance with an embodiment, a method for managing a memory within a system-on-a-chip including a processor, a memory and a firewall device, includes: generating, by the processor, a request to access the memory, where the request has a access permission level; controlling, by the firewall device, access to the at least one memory region of the memory as a function of the access permission level of the request and a respective access permission level associated with at least one memory region; and erasing, by the firewall device, the at least one memory regions when its respective access permission level is modified, where erasing comprises performing a hardware-implemented erasure.
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