-
1.发明授权公开(公告)号：US11928339B2
公开(公告)日：2024-03-12
申请号：US17825975
申请日：2022-05-26
发明人： Frederic Ruelle , Michel Jaouen
IPC分类号： G06F3/06
CPC分类号： G06F3/062 , G06F3/0604 , G06F3/064 , G06F3/0679
摘要： System, method, and circuitry for generating content for a programmable computing device based on user-selected memory regions. Contiguous regions that share memory access attributes are merged, interleaved contiguous regions that share at least one nested attribute are defined into combined regions, and remaining regions are defined as separate independent regions. A memory protection unit (MPU) region size closest to a size of each defined region is identified. If the start address of each region aligns with the address structure of the MPU region size, then those regions are assigned to MPU regions having the MPU region size; otherwise, another MPU size that aligns with the size of the regions is selected and those regions are assigned to MPU regions having that size. Content is generated to configure settings of MPU regions of the programmable computing device for the merged contiguous regions, the combined region, and the independent regions.
-
公开(公告)号：US20230015027A1
公开(公告)日：2023-01-19
申请号：US17812883
申请日：2022-07-15
发明人： Michel Jaouen , Loic Pallardy
IPC分类号： G06F21/62 , G06F12/0802
摘要： In an embodiment a method for managing access rights of software tasks executed by a processing unit (CPU) using a cache memory containing execution data of the tasks in memory locations, each execution data having an attribute representative of a level of access right of the respective task, includes changing the attributes of the locations of the cache memory when the access rights of at least one task changes and retaining the execution data contained in the locations of the cache memory.
-
公开(公告)号：US11893370B2
公开(公告)日：2024-02-06
申请号：US17451394
申请日：2021-10-19
发明人： Michel Jaouen , Stephane Le Roy , Moise Gergaud
CPC分类号： G06F8/44 , G06F21/54 , G06F21/55 , G06F2221/033
摘要： According to one aspect, a method for compiling by a compilation tool a source code into a computer-executable code comprises receiving the source code as input of the compilation tool, translating the source code into an object code comprising machine instructions executable by a processor, then introducing, between machine instructions of the object code, additional instructions selected from illegal instructions and no-operation instructions so as to obtain the executable code, then delivering the executable code as output of the compilation tool.
-
公开(公告)号：US12061888B2
公开(公告)日：2024-08-13
申请号：US17882292
申请日：2022-08-05
发明人： Michel Jaouen , Gilles Trottier
摘要： A method can be used for verifying an execution of a compiled software program stored in a program memory of a processor and executed by the processor. A write operation includes assigning a destination address in a register of the processor and writing a datum at a location pointed to by the destination address contained in the register. A verification operation includes reassigning the same destination address in the same register, reading the datum contained at the location pointed to by the destination address contained in the register after the reassignment, and comparing the read datum and the written datum.
-
公开(公告)号：US20230161486A1
公开(公告)日：2023-05-25
申请号：US18058613
申请日：2022-11-23
发明人： Loic Pallardy , Michel Jaouen
IPC分类号： G06F3/06
CPC分类号： G06F3/0622 , G06F3/0637 , G06F3/0673
摘要： In accordance with an embodiment, a method for managing a memory within a system-on-a-chip including a processor, a memory and a firewall device, includes: generating, by the processor, a request to access the memory, where the request has a access permission level; controlling, by the firewall device, access to the at least one memory region of the memory as a function of the access permission level of the request and a respective access permission level associated with at least one memory region; and erasing, by the firewall device, the at least one memory regions when its respective access permission level is modified, where erasing comprises performing a hardware-implemented erasure.
-
公开(公告)号：US20230161484A1
公开(公告)日：2023-05-25
申请号：US17989389
申请日：2022-11-17
发明人： Loic Pallardy , Michel Jaouen
IPC分类号： G06F3/06
CPC分类号： G06F3/0622 , G06F3/0655 , G06F3/0673
摘要： In embodiments, a system includes a first and a second processing unit, a memory, and a firewall device. The first processing unit operates in a secure mode and generates memory access requests having a secure level. The second processing unit operates in a non-secure mode and generates memory access requests having a non-secure level. The memory includes a first memory area that can be shared between the first and second processing units. The firewall device includes a first firewall circuit with a first configuration authorizing access to the first memory area in the presence of a secure or non-secure level access request. The firewall circuit includes a second configuration prohibiting access to the first memory area in the presence of a secure level access request and authorizing access to the first memory area only in the presence of a non-secure level access request.
-
7.发明公开公开(公告)号：US20230342279A1
公开(公告)日：2023-10-26
申请号：US18306032
申请日：2023-04-24
发明人： Michel Jaouen , Loic Pallardy
CPC分类号： G06F11/3466 , G06F11/3612
摘要： A method is provided for monitoring an execution of a selected program code portion stored in a memory address range between a start address and an end address. The method includes starting a timing when a program counter points to the start address of the selected program code portion. Current values of the program counter are compared with a set of target addresses specific to the selected program code portion including the end address of the selected program code portion. The timing is stopped when the program counter points to the end address of the selected program code portion. An error signal is generated in response to the timing duration being outside a nominal duration range specific to the selected program code portion.
-
8.发明公开公开(公告)号：US20230161863A1
公开(公告)日：2023-05-25
申请号：US18058130
申请日：2022-11-22
发明人： Michel Jaouen , Loic Pallardy , Ludovic Barre
IPC分类号： G06F21/44
CPC分类号： G06F21/44
摘要： In an embodiment a method includes compiling, by a processor in a compiling phase, a software program intended to be executed by the processor, the processor having secure and non-secure access right level execution contexts, and/or privileged and non-privileged access right level execution contexts and generating, in the compilation phase, instructions in machine language having an exclusively secure access right level when the instructions are intended to be executed in the secure access right level execution context, and instructions having a non-privileged access right level when the instructions are intended to be executed in the non-privileged access right level execution context.
-
公开(公告)号：US20230040093A1
公开(公告)日：2023-02-09
申请号：US17882292
申请日：2022-08-05
发明人： Michel Jaouen , Gilles Trottier
摘要： A method can be used for verifying an execution of a compiled software program stored in a program memory of a processor and executed by the processor. A write operation includes assigning a destination address in a register of the processor and writing a datum at a location pointed to by the destination address contained in the register. A verification operation includes reassigning the same destination address in the same register, reading the datum contained at the location pointed to by the destination address contained in the register after the reassignment, and comparing the read datum and the written datum.
-
公开(公告)号：US20220164172A1
公开(公告)日：2022-05-26
申请号：US17451394
申请日：2021-10-19
发明人： Michel Jaouen , Stephane Le Roy , Moise Gergaud
摘要： According to one aspect, a method for compiling by a compilation tool a source code into a computer-executable code comprises receiving the source code as input of the compilation tool, translating the source code into an object code comprising machine instructions executable by a processor, then introducing, between machine instructions of the object code, additional instructions selected from illegal instructions and no-operation instructions so as to obtain the executable code, then delivering the executable code as output of the compilation tool.
-
-
-
-
-
-
-
-
-
搜索结果
11 条记录 (耗时 0.016 秒)
