Invention Publication
- Patent Title: READ ALGORITHMS FOR THREE-DIMENSIONAL CROSSPOINT MEMORY ARCHITECTURES
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Application No.: US17540884Application Date: 2021-12-02
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Publication No.: US20230178148A1Publication Date: 2023-06-08
- Inventor: Rouhollah Mousavi Iraei , Mini Goel , Raymond Zeng , Hemant P. Rao
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G11C13/00
- IPC: G11C13/00 ; G06F3/06

Abstract:
In one embodiment, a state is reach from a memory cell comprising a phase change material (PM) region and a select device (SD) region by: ramping a voltage applied to a first address line of an address line pair corresponding to the memory cell until the first address line voltage is stabilized at a predetermined voltage, ramping a voltage applied to a second address line of the address line pair corresponding to the memory cell, detecting a snap in the memory cell while ramping the voltage applied to the second address line, and determining a state of the memory cell based on a differential voltage between the first and second address lines when the memory cell snap occurred.
Public/Granted literature
- US12119057B2 Read algorithms for three-dimensional crosspoint memory architectures Public/Granted day:2024-10-15
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