PACKAGING ARCHITECTURE WITH INTEGRATED CIRCUIT DIES OVER INPUT/OUTPUT INTERFACES
Abstract:
Embodiments of the present disclosure provide a microelectronic assembly comprising: a first integrated circuit (IC) die, the first IC die comprising an input/output (IO) circuit; and a plurality of IC dies, the plurality of IC dies comprising a second IC die, the second IC die comprising a microcontroller circuit to control the IO circuit, wherein the first IC die and the plurality of IC dies are coupled with interconnects having a pitch of less than 10 micrometers between adjacent ones of the interconnects.
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