公开(公告)号：US20240355768A1

公开(公告)日：2024-10-24

申请号：US18761443

申请日：2024-07-02

申请人： Intel Corporation

发明人： Adel A. Elsherbini ,  Krishna Bharath ,  Kevin P. O'Brien ,  Kimin Jun ,  Han Wui Then ,  Mohammad Enamul Kabir ,  Gerald S. Pasdast ,  Feras Eid ,  Aleksandar Aleksov ,  Johanna M. Swan ,  Shawna M. Liff

IPC分类号： H01L23/00 ,  H01L25/065

CPC分类号： H01L24/08 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L25/0657 ,  H01L28/10 ,  H01L2224/05147 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/0801 ,  H01L2224/08145 ,  H01L2224/0903 ,  H01L2224/09055 ,  H01L2224/09505 ,  H01L2224/29186 ,  H01L2224/32145

摘要： Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes at least part of an inductor.

公开(公告)号：US12057402B2

公开(公告)日：2024-08-06

申请号：US17025166

申请日：2020-09-18

申请人： Intel Corporation

发明人： Aleksandar Aleksov ,  Adel A. Elsherbini ,  Shawna M. Liff ,  Johanna M. Swan ,  Feras Eid ,  Randy B. Osborne ,  Van H. Le

IPC分类号： H01L23/538 ,  H01L23/49 ,  H01L25/065

CPC分类号： H01L23/5384 ,  H01L23/49 ,  H01L23/5385 ,  H01L23/5386 ,  H01L25/0657

摘要： Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include an interposer, including an organic dielectric material, and a microelectronic component coupled to the interposer by direct bonding.

公开(公告)号：US11967580B2

公开(公告)日：2024-04-23

申请号：US17956773

申请日：2022-09-29

申请人： Intel Corporation

发明人： Adel A. Elsherbini ,  Amr Elshazly ,  Arun Chandrasekhar ,  Shawna M. Liff ,  Johanna M. Swan

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L25/0652 ,  H01L23/49822 ,  H01L25/50

摘要： Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate, a first die coupled to the package substrate with first interconnects, and a second die coupled to the first die with second interconnects, wherein the second die is coupled to the package substrate with third interconnects, a communication network is at least partially included in the first die and at least partially included in the second die, and the communication network includes a communication pathway between the first die and the second die.

公开(公告)号：US11916006B2

公开(公告)日：2024-02-27

申请号：US17822200

申请日：2022-08-25

申请人： Intel Corporation

发明人： Adel A. Elsherbini ,  Kaladhar Radhakrishnan ,  Krishna Bharath ,  Shawna M. Liff ,  Johanna M. Swan

IPC分类号： H01L23/498 ,  G05F1/46 ,  H01L23/00 ,  H01L23/522 ,  H01L23/64 ,  H01L49/02 ,  H01F27/24

CPC分类号： H01L23/49838 ,  G05F1/46 ,  H01L23/5226 ,  H01L23/642 ,  H01L23/645 ,  H01L24/17 ,  H01L28/10 ,  H01L28/40 ,  H01F27/24

摘要： Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate having a surface; a die having a first surface and an opposing second surface; and a chiplet having a first surface and an opposing second surface, wherein the chiplet is between the surface of the package substrate and the first surface of the die, wherein the first surface of the chiplet is coupled to the surface of the package substrate and the second surface of the chiplet is coupled to the first surface of the die, and wherein the chiplet includes: a capacitor at the first surface; and an element at the second surface, wherein the element includes a switching transistor or a diode.

公开(公告)号：US11764452B2

公开(公告)日：2023-09-19

申请号：US17672876

申请日：2022-02-16

申请人： Intel Corporation

发明人： Georgios Dogiamis ,  Adel A. Elsherbini ,  Telesphor Kamgaing ,  Henning Braunisch ,  Johanna M. Swan

IPC分类号： H01P3/16 ,  H01L23/66 ,  H01P11/00 ,  H04B10/2581

CPC分类号： H01P3/16 ,  H01L23/66 ,  H01P11/006 ,  H01L2223/6627 ,  H04B10/2581

摘要： Disclosed herein are various designs for dielectric waveguides, as well as methods of manufacturing such waveguides. One type of dielectric waveguides described herein includes waveguides with one or more cavities in the dielectric waveguide material. Another type of dielectric waveguides described herein includes waveguides with a conductive ridge in the dielectric waveguide material. Dielectric waveguides described herein may be dispersion reduced dielectric waveguides, compared to conventional dielectric waveguides, and may be designed to adjust the difference in the group delay between the lower frequencies and the higher frequencies of a chosen bandwidth.

公开(公告)号：US20230127749A1

公开(公告)日：2023-04-27

申请号：US18086308

申请日：2022-12-21

申请人： Intel Corporation

发明人： Shawna M. Liff ,  Adel A. Elsherbini ,  Johanna M. Swan ,  Arun Chandrasekhar

IPC分类号： H01L23/00 ,  H01L25/18 ,  H01L25/00

摘要： Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface, and a die secured to the package substrate, wherein the die has a first surface and an opposing second surface, the die has first conductive contacts at the first surface and second conductive contacts at the second surface, and the first conductive contacts are coupled to conductive pathways in the package substrate by first non-solder interconnects.

公开(公告)号：US20220399324A1

公开(公告)日：2022-12-15

申请号：US17344348

申请日：2021-06-10

申请人： Intel Corporation

发明人： Han Wui Then ,  Adel A. Elsherbini ,  Kimin Jun ,  Johanna M. Swan ,  Shawna M. Liff ,  Sathya Narasimman Tiagaraj ,  Gerald S. Pasdast ,  Aleksandar Aleksov ,  Feras Eid

IPC分类号： H01L25/00 ,  H01L25/065 ,  H01L23/00

摘要： A die assembly comprising: a first component layer having conductive through-connections in an insulator, a second component layer comprising a die, and an active device layer (ADL) at an interface between the first component layer and the second component layer. The ADL comprises active elements electrically coupled to the first component layer and the second component layer. The die assembly further comprises a bonding layer electrically coupling the ADL to the second component layer. In some embodiments, the die assembly further comprises another ADL at another interface between the first component layer and a package support opposite to the interface. The first component layer may comprise another die having through-substrate vias (TSVs). The die and the another die may be fabricated using different process nodes.

公开(公告)号：US20220399294A1

公开(公告)日：2022-12-15

申请号：US17347394

申请日：2021-06-14

申请人： Intel Corporation

发明人： Georgios Dogiamis ,  Qiang Yu ,  Adel A. Elsherbini ,  Shawna M. Liff

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/538 ,  H01L25/00

摘要： Microelectronic assemblies, and related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a die-level interposer having a first surface and an opposing second surface; a first die coupled to the first surface of the die-level interposer by a first hybrid bonding region having a first pitch; a second die coupled to the second surface of the die-level interposer by a second hybrid bonding region having a second pitch different from the first pitch; and a third die coupled to the second surface of the die-level interposer by a third hybrid bonding region having a third pitch different from the first and second pitches.

公开(公告)号：US20220399277A1

公开(公告)日：2022-12-15

申请号：US17345969

申请日：2021-06-11

申请人： INTEL CORPORATION

发明人： Adel A. Elsherbini ,  Scott E. Siers ,  Sathya Narasimman Tiagaraj ,  Gerald S. Pasdast ,  Zhiguo Qian ,  Kalyan C. Kolluru ,  Vivek Kumar Rajan ,  Shawna M. Liff ,  Johanna M. Swan

IPC分类号： H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48 ,  H01L25/00

摘要： An Integrated Circuit (IC), comprising a first conductive trace on a first die, a second conductive trace on a second die, and a conductive pathway electrically coupling the first conductive trace with the second conductive trace. The second die is coupled to the first die with interconnects. The conductive pathway comprises a portion of the interconnects located proximate to a periphery of a region in the first die through which the first conductive trace is not routable. In some embodiments, the conductive pathway reroutes electrical connections away from the region. The region comprises a high congestion zone having high routing density in some embodiments. In other embodiments, the region comprises a “keep-out” zone.

公开(公告)号：US20220230964A1

公开(公告)日：2022-07-21

申请号：US17716229

申请日：2022-04-08

申请人： Intel Corporation

发明人： Shawna M. Liff ,  Adel A. Elsherbini ,  Johanna M. Swan

IPC分类号： H01L23/538 ,  H01L25/065

摘要： Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a first die comprising a first face and a second face; and a second die, the second die comprising a first face and a second face, wherein the second die further comprises a plurality of first conductive contacts at the first face and a plurality of second conductive contacts at the second face, and the second die is between first-level interconnect contacts of the microelectronic assembly and the first die.