发明公开
- 专利标题: Timing Skew Calibration in Time-Interleaved Data Converters in Carrier Aggregation
-
申请号: US17697821申请日: 2022-03-17
-
公开(公告)号: US20230299933A1公开(公告)日: 2023-09-21
- 发明人: Jun Fang , John Szeming Wang , Sian She
- 申请人: Avago Technologies International Sales Pte. Limited
- 申请人地址: SG Singapore
- 专利权人: Avago Technologies International Sales Pte. Limited
- 当前专利权人: Avago Technologies International Sales Pte. Limited
- 当前专利权人地址: SG Singapore
- 主分类号: H04L5/14
- IPC分类号: H04L5/14
摘要:
An apparatus includes an analog to digital converter configured to receive one or more first frames of a first component carrier signal having a first uplink-downlink subframe pattern, and receive one or more additional frames of at least one additional component carrier signal, the one more or more additional frames including one or more second frames of a second component carrier signal, the at least one additional component carrier signal including the second component carrier signal. The apparatus may further include control logic configured to activate timing skew calibration of at least one of the first or second component carrier signals based, at least in part, on an operating mode of the second component carrier signal and respective symbols of the first component carrier signal and second component carrier signal.
公开/授权文献
信息查询