A semiconductor device including a wafer, a first semiconductor device and a second semiconductor device on a front side of the wafer, power rails on a back side of the wafer, a backside power distribution network (PDN) grid on the back side of the wafer, and front-side signal routing lines above the first and second semiconductor devices on the front side of the wafer. The second semiconductor device is stacked on the first semiconductor device, the backside PDN grid is coupled to the power rails, and the power rails are coupled to the first and second semiconductor devices.