Invention Publication
- Patent Title: VECTOR-BY-MATRIX-MULTIPLICATION ARRAY UTILIZING ANALOG OUTPUTS
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Application No.: US17847491Application Date: 2022-06-23
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Publication No.: US20230325650A1Publication Date: 2023-10-12
- Inventor: Hieu Van Tran , THUAN VU , STANLEY HONG , STEPHEN TRINH , MARK REITEN
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: G06G7/06
- IPC: G06G7/06 ; G06G7/16

Abstract:
Numerous examples are disclosed of an artificial neural network that comprises vector-by-matrix multiplication arrays utilizing analog outputs. In one example, a system comprises a vector by matrix multiplication array comprising a plurality of non-volatile memory cells arranged in rows and columns; and an output circuit to receive a respective neuron current from respective columns of the vector by matrix multiplication array and to generate a respective output voltage, the output circuit comprising a neuron scalar to generate a scaled current from the received respective neuron current, and a current-to-voltage converter to convert the scaled current into the respective output voltage.
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