- 专利标题: METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURE
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申请号: US18333507申请日: 2023-06-12
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公开(公告)号: US20230326956A1公开(公告)日: 2023-10-12
- 发明人: Ting-Cih KANG , Hsih-Yang CHIU
- 申请人: NANYA TECHNOLOGY CORPORATION
- 申请人地址: TW New Taipei City
- 专利权人: NANYA TECHNOLOGY CORPORATION
- 当前专利权人: NANYA TECHNOLOGY CORPORATION
- 当前专利权人地址: TW New Taipei City
- 分案原申请号: US16997954 2020.08.20
- 主分类号: H01L21/02
- IPC分类号: H01L21/02 ; H01G4/30 ; H01L23/522
摘要:
A semiconductor structure includes a trench capacitor, a stacked capacitor, a first electrode plate, and a second electrode plate. The trench capacitor is located in a substrate, in which the trench capacitor has a first conductive structure and a first dielectric structure in contact with the first conductive structure. The stacked capacitor has a second conductive structure and a second dielectric structure in contact with the second conductive structure, in which the stacked capacitor is at least partially aligned with the trench capacitor in an axis vertical to a top surface of the substrate, and the first and second conductive structures are electrically connected. The trench capacitor and the stacked capacitor are electrically connected in parallel between the first and second electrode plates.
公开/授权文献
- US12027575B2 Method for fabricating semiconductor structure 公开/授权日:2024-07-02
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