Invention Publication
- Patent Title: Integrated Circuitry, Array Of Cross-Point Memory Cells, Method Used In Forming Integrated Circuitry
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Application No.: US17742154Application Date: 2022-05-11
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Publication No.: US20230371282A1Publication Date: 2023-11-16
- Inventor: David A. Kewley , Kevin Baker , Trupti D. Gawai
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: H01L27/24
- IPC: H01L27/24 ; G11C13/00

Abstract:
Integrated circuitry comprises a horizontally-elongated insulative wall directly above a conductive node. The wall comprises insulative material. A conductive via extends through the wall to the conductive node. A conductive line is directly above the wall and directly above the conductive via. The conductive via directly electrically couples together the conductive line with the conductive node. Insulator material is longitudinally-along laterally-opposing sides of the wall. An interface of the insulative material of the wall and the insulator material are on each of the laterally-opposing sides of the wall. Other embodiments, including method, are disclosed.
Information query
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