Invention Application
- Patent Title: Selectable Monolithic or External Scalable Die-to-Die Interconnection System Methodology
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Application No.: US17483535Application Date: 2021-09-23
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Publication No.: US20230085890A1Publication Date: 2023-03-23
- Inventor: Sanjay Dabral , Jun Zhai , Jung-Cheng Yeh , Kunzhong Hu , Raymundo Camenforte , Thomas Hoffmann
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L23/58 ; H01L23/538 ; H01L23/48 ; H01L25/065
Abstract:
Multi-die structures and methods of fabrication are described. In an embodiment, a multi-die structure includes a first die, a second die, and die-to-die routing connecting the first die to the second die. The die-to-die interconnection may be monolithically integrated as a chip-level die-to-die routing, or external package-level die-to-die routing.
Public/Granted literature
- US11862557B2 Selectable monolithic or external scalable die-to-die interconnection system methodology Public/Granted day:2024-01-02
Information query
IPC分类:
