- 专利标题： VERTICAL TRANSPORT FIELD-EFFECT TRANSISTOR WITH GATE PATTERNING
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申请号： US17448777申请日： 2021-09-24
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公开(公告)号： US20230101011A1公开(公告)日： 2023-03-30
- 发明人: RUILONG XIE , WENYU XU , INDIRA SESHADRI , JING GUO , EKMINI ANUJA DE SILVA
- 申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 申请人地址： US NY ARMONK
- 专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址： US NY ARMONK
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/8238 ; H01L27/092 ; H01L29/66 ; H01L29/40
摘要：
A semiconductor device is provided. The semiconductor device includes a bottom epitaxial layer, a gate stack formed over the bottom epitaxial layer, the gate stack including a work function metal (WFM) layer, a channel fin formed on the bottom epitaxial layer, a first interlayer dielectric (ILD) layer formed in a gate landing area over the gate stack, a second ILD layer formed in an area other than the gate landing area, and a WFM encapsulation layer formed between the first ILD layer and the second ILD layer, and formed on sidewalls of the gate stack.
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