Invention Application
- Patent Title: ELECTRONIC DEVICES INCLUDING TIERED STACKS INCLUDING CONDUCTIVE STRUCTURES ISOLATED BY SLOT STRUCTURES, AND RELATED SYSTEMS AND METHODS
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Application No.: US17453041Application Date: 2021-11-01
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Publication No.: US20230139457A1Publication Date: 2023-05-04
- Inventor: Sidhartha Gupta , Anilkumar Chandolu
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L27/11519 ; H01L27/11524 ; H01L27/11556 ; H01L27/11565 ; H01L27/1157 ; H01L27/11582 ; H01L23/532 ; H01L21/768

Abstract:
An electronic device comprises a stack comprising tiers of alternating conductive structures and insulative structures overlying a source tier, and strings of memory cells extending vertically through the stack. The strings of memory cells individually comprise a channel material extending vertically through the stack. The electronic device comprises an additional stack overlying the stack and comprising tiers of alternating additional conductive structures and additional insulative structures, and pillars extending through the additional stack and overlying the strings of memory cells. Each of the pillars is horizontally offset in a first horizontal direction and in a second horizontal direction transverse to the first horizontal direction from a center of a corresponding string of memory cells. The electronic device comprises conductive lines overlying the pillars, and interconnect structures directly contacting the pillars and the conductive lines. Related electronic devices, systems, and methods are also described.
Public/Granted literature
Information query
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