Invention Application
- Patent Title: MULTI-CHIP PACKAGE WITH HIGH DENSITY INTERCONNECTS
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Application No.: US18091781Application Date: 2022-12-30
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Publication No.: US20230140389A1Publication Date: 2023-05-04
- Inventor: Aleksandar ALEKSOV , Adel A. ELSHERBINI , Kristof DARMAWIKARTA , Robert A. MAY , Sri Ranga Sai BOYAPATI
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L25/18 ; H01L25/065 ; H01L21/48 ; H01L23/00 ; H01L23/31 ; H01L25/00 ; H01L23/498

Abstract:
An apparatus is provided which comprises: a plurality of first conductive contacts having a first pitch spacing on a substrate surface, a plurality of second conductive contacts having a second pitch spacing on the substrate surface, and a plurality of conductive interconnects disposed within the substrate to couple a first grouping of the plurality of second conductive contacts associated with a first die site with a first grouping of the plurality of second conductive contacts associated with a second die site and to couple a second grouping of the plurality of second conductive contacts associated with the first die site with a second grouping of the plurality of second conductive contacts associated with the second die site, wherein the conductive interconnects to couple the first groupings are present in a layer of the substrate above the conductive interconnects to couple the second groupings. Other embodiments are also disclosed and claimed.
Public/Granted literature
- US12218069B2 Multi-chip package with high density interconnects Public/Granted day:2025-02-04
Information query
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