Invention Publication
- Patent Title: SCHEDULING TRAINING OF AN INTER-CHIPLET INTERFACE
-
Application No.: US17853842Application Date: 2022-06-29
-
Publication No.: US20240004815A1Publication Date: 2024-01-04
- Inventor: Michael J. Tresidder , Benjamin Tsien
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F13/364
- IPC: G06F13/364 ; G06F9/48

Abstract:
Systems and methods are disclosed for scheduling a data link training by a controller. The system and method include receiving an indication that a physical layer of a data link is not transferring data and initiating a training process of the physical layer of the data link in response to the indication that the physical layer of the data link is not transferring data. In one aspect, the indication that the physical layer of a data link is not transferring data is an indication that the physical layer of the data link is in a low power state. In another aspect, the indication that the physical layer of a data link is not transferring data is an indication that a data transfer has been completed.
Information query