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Abstract:
A semiconductor device including a first source/drain region (S/D) located on a frontside of a substrate, wherein the first source/drain region has a first width, a second S/D region located on the frontside of the substrate, wherein the second source/drain region is located above the first source drain region, wherein the second source/drain region has second width, wherein the first width is larger than the second width, a first power rail located on a backside of the substrate, a second power rail located on the backside of the substrate, a first connector in contact with the first source/drain region, wherein the first connector is only in contact with a sidewall of the first source/drain region, and a second connector in contact with the second source/drain region, wherein the second connector is in contact with a top surface and a side surface of the second source/drain region.
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