Invention Publication
- Patent Title: ELECTRICAL AND LOGIC ISOLATION FOR SYSTEMS ON A CHIP
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Application No.: US18479177Application Date: 2023-10-02
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Publication No.: US20240027515A1Publication Date: 2024-01-25
- Inventor: Jose Luis Flores , Ramakrishnan Venkatasubramanian , Samuel Paul Visalli
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/40 ; G06F1/3203
Abstract:
In described examples, an SoC includes at least two voltage domains interconnected with a communication bus. Detection logic in a first voltage domain determines when a voltage error occurs in a second voltage domain and isolates communication via the communication bus when a voltage error or a timing error is detected.
Information query
