- 专利标题: WAFER-ON-WAFER MEMORY DEVICE ARCHITECTURES
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申请号: US18228148申请日: 2023-07-31
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公开(公告)号: US20240062786A1公开(公告)日: 2024-02-22
- 发明人: Kitae Park , Aaron Yip
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 主分类号: G11C5/06
- IPC分类号: G11C5/06 ; H10B80/00 ; H01L23/528 ; G11C16/08 ; H01L25/065
摘要:
A memory device includes a memory array die corresponding to a memory array, an access circuitry die corresponding to peripheral circuitry to support access operations with respect to the memory array, and a bonding layer disposed between the memory array die and the access circuitry die to form an interconnection between the memory array and the access circuitry. In some embodiments, the access circuitry die further integrates a local media controller corresponding to the memory array. In some embodiments, the local media controller is located external to the access circuitry die.
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