Invention Publication
- Patent Title: OUTPUT CIRCUIT
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Application No.: US18489440Application Date: 2023-10-18
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Publication No.: US20240072058A1Publication Date: 2024-02-29
- Inventor: Isaya SOBUE , Hidetoshi TANAKA
- Applicant: Socionext Inc.
- Applicant Address: JP Kanagawa
- Assignee: Socionext Inc.
- Current Assignee: Socionext Inc.
- Current Assignee Address: JP Kanagawa
- Priority: JP 21072819 2021.04.22
- Main IPC: H01L27/118
- IPC: H01L27/118

Abstract:
In a semiconductor integrated circuit device, an output circuit includes a first transistor connected between VSS and an output terminal. A first power line supplying VSS is formed in a buried interconnect layer, and above the buried interconnect layer, a second power line supplying VSS is formed in an M1 interconnect layer and a third power line connected to the second power line is formed in an M2 interconnect layer. A first output interconnect is formed in the M1 interconnect layer, and a second output interconnect connected to the first output interconnect is formed in the M2 interconnect layer.
Information query
IPC分类: