Invention Publication

INTERPOSER POWER CORRIDOR
Abstract:
The present disclosure is directed to a semiconductor platform having a printed circuit board with an interposer coupled thereto. The interposer includes a low-resistance metal layer that acts as a power corridor, and a first non-conductive layer and a second non-conductive layer, respectively, positioned on the top and bottom surfaces of the metal layer. In addition, the interposer also includes a plurality of vertical interconnects that provide electrical connections through the interposer. A semiconductor package and other components may be coupled to the interposer, for which the interposer provides a power corridor for the semiconductor package and the components, and to the print circuit board via the plurality of vertical interconnects.
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