Invention Publication
- Patent Title: DYNAMIC UPDATES TO LOGICAL-TO-PHYSICAL ADDRESS TRANSLATION TABLE BITMAPS
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Application No.: US18428758Application Date: 2024-01-31
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Publication No.: US20240168889A1Publication Date: 2024-05-23
- Inventor: Nicola Colella , Antonino Pollio , Gianfranco Ferrante
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F12/1009
- IPC: G06F12/1009 ; G06F12/02 ; G06F12/0873

Abstract:
A method includes: creating a logical-to-physical address translation (L2P) bitmap for each respective virtual block programmed across a plane of multiple dice of a memory device, each L2P bitmap identifying logical addresses, within each respective L2P table of a plurality of L2P tables, that belong to a respective virtual block; creating a virtual block (VB) bitmap for each respective L2P table, the VB bitmap identifying virtual blocks to which the respective L2P table points; creating an updated VB bitmap for a first L2P table, of the plurality of L2P tables, based on changes to the first L2P table; determining that an entry in the VB bitmap is different than the entry in the updated VB bitmap, the entry corresponding to a particular virtual block; and identifying and updating, by the processing device, an L2P bitmap associated with the particular virtual block for an L2P mapping corresponding to the entry.
Information query
IPC分类: