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公开(公告)号：US12039189B2
公开(公告)日：2024-07-16
申请号：US17900361
申请日：2022-08-31
Applicant: Micron Technology, Inc.
Inventor： Francesco Basso , Antonino Pollio , Francesco Falanga , Massimo Iaculo
IPC: G06F3/06
CPC classification number: G06F3/0653 , G06F3/0604 , G06F3/0652 , G06F3/0679
Abstract: Methods, systems, and devices for idle mode temperature control for memory systems are described. A memory system may implement the use of one or more dummy access commands to reduce the effects of errors introduced by temperature changes while the memory system is in an idle mode. For example, performing one or more access commands, such as one or more read commands, may increase a temperature of a memory device and support a desired operating temperature for the memory device while the memory system is in the idle mode. The memory system may measure the temperature of the memory device during the idle mode. If the memory system determines that the temperature of the memory device has fallen below a threshold temperature, the memory system may issue a quantity of dummy access commands to the memory device, and the corresponding dummy access operations may result in a temperature increase at the memory device.
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公开(公告)号：US11657878B2
公开(公告)日：2023-05-23
申请号：US17586526
申请日：2022-01-27
Applicant: Micron Technology, Inc.
Inventor： Antonino Pollio , Giuseppe Vito Portacci , Mauro Luigi Sali , Alessandro Magnavacca
Abstract: Methods, systems, and devices for initialization techniques for memory devices are described. A memory system may include a memory array on a first die and a controller on a second die, where the second die is coupled with the first die. The controller may perform an initialization procedure based on operating instructions stored within the memory system. For example, the controller may read a first set of operating instructions from read-only memory on the second die. The controller may obtain a second set of operating instructions stored at a memory block of the memory array on the first die, with the memory block indicated by the first set of operating instructions. The controller may complete or at least further the initialization procedure based on the second set of operating instructions.
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公开(公告)号：US11556275B2
公开(公告)日：2023-01-17
申请号：US17323974
申请日：2021-05-18
Applicant: Micron Technology, Inc.
Inventor： Nicola Colella , Antonino Pollio , Gianfranco Ferrante
Abstract: Methods, systems, and devices for using page line filler data are described. In some examples, a memory system may store data within a write buffer of the memory system. The memory system may initiate an operation to transfer the write buffer data to a memory device, for example, due to a command to perform a memory management operation (e.g., cache synchronization, context switching, or the like) from a host system. In some examples, a quantity of write buffer data may fail to satisfy a data size threshold. Thus, the memory system may aggregate the data in the write buffer with valid data from a block of the memory device associated with garbage collection. The memory system may aggregate the write buffer data with the garbage collection data until the aggregated data satisfies the data size threshold. The memory system may then write the aggregated data to the memory device.
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公开(公告)号：US11513952B2
公开(公告)日：2022-11-29
申请号：US16918333
申请日：2020-07-01
Applicant: Micron Technology, Inc.
Inventor： Nicola Colella , Antonino Pollio
IPC: G06F12/02
Abstract: Methods, systems, and devices for data separation for garbage collection are described. A control component coupled to the memory array may identify a source block for a garbage collection procedure. In some cases, a first set of pages of the source block may be identified as a first type associated with a first access frequency and a second set of pages of the source block ay be identified as a second type associated with a second access frequency. Once the pages are identified as either the first type or the second type, the first set of pages may be transferred to a first destination block, and the second set of pages may be transferred to a second destination block as part of the garbage collection procedure.
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公开(公告)号：US20240185926A1
公开(公告)日：2024-06-06
申请号：US18517903
申请日：2023-11-22
Applicant: Micron Technology, Inc.
Inventor： Huai-Yuan Tseng , Kishore Kumar Mucherla , William Charles Filipiak , Eric N. Lee , Andrew Bicksler , Ugo Russo , Niccolo' Righetti , Christian Caillat , Akira Goda , Ting Luo , Antonino Pollio
CPC classification number: G11C16/102 , G11C16/16 , G11C16/3404
Abstract: A variety of applications can include one or more memory devices having user data preloaded for the application prior to reflowing the memory devices on the system platform of the application. A touch-up data refresh method can be implemented to gain read window budget and to improve retention slope to protect the preload content to tolerate reflow to the system platform. Techniques for data preload can include programming preload data into targeted blocks until the targeted blocks are programmed with the preload data and re-programming the preload data over the programmed preload data in the targeted blocks in a same set of memory cells, without an erase between programming and re-programming the preload data. Variations of such techniques can be used to prepare a memory device with preload data followed by performing a reflow of the memory device to a structure for an application to which the memory device is implemented.
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Patent Agency Ranking
公开(公告)号：US11768627B2
公开(公告)日：2023-09-26
申请号：US18095771
申请日：2023-01-11
Applicant: Micron Technology, Inc.
Inventor： Nicola Colella , Antonino Pollio , Gianfranco Ferrante
CPC classification number: G06F3/0656 , G06F3/0604 , G06F3/0676 , G06F3/0679 , G06F12/0253
Abstract: Methods, systems, and devices for using page line filler data are described. In some examples, a memory system may store data within a write buffer of the memory system. The memory system may initiate an operation to transfer the write buffer data to a memory device, for example, due to a command to perform a memory management operation (e.g., cache synchronization, context switching, or the like) from a host system. In some examples, a quantity of write buffer data may fail to satisfy a data size threshold. Thus, the memory system may aggregate the data in the write buffer with valid data from a block of the memory device associated with garbage collection. The memory system may aggregate the write buffer data with the garbage collection data until the aggregated data satisfies the data size threshold. The memory system may then write the aggregated data to the memory device.
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公开(公告)号：US20220406388A1
公开(公告)日：2022-12-22
申请号：US17736902
申请日：2022-05-04
Applicant: Micron Technology, Inc.
Inventor： Umberto Siciliani , Tao Liu , Ting Luo , Dionisio Minopoli , Giuseppe D'Eliseo , Giuseppe Ferrari , Walter Di'Francesco , Antonino Pollio , Luigi Esposito , Anna Scalesse , Allison J. Olson , Anna Chiara Siviero
Abstract: Methods, systems, and devices for setting switching for single-level cells (SLCs) are described. A memory system may receive an access command from a host. The access command may correspond to an SLC block or to a multiple-level cell block. If the access command corresponds to an SLC block, the memory system may modify the access command to include one or more bits indicating a setting to use for performing the access operation corresponding to the access command. The setting may define one or more operating parameters for performing the access operation. The memory system may use bits to indicate the setting that are used to indicate a page address for multiple-level cell blocks. The memory system may issue the access command to a memory device, which may perform the access operation using the setting indicated in the one or more bits included by the memory system.
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公开(公告)号：US11379367B2
公开(公告)日：2022-07-05
申请号：US16952813
申请日：2020-11-19
Applicant: Micron Technology, Inc.
Inventor： Nicola Colella , Antonino Pollio , Hua Tan
IPC: G06F12/00 , G06F12/0802 , G06F12/02
Abstract: Methods, systems, and devices for read operations for regions of a memory device are described. In some examples, a memory device may include a first cache for storing mappings between logical addresses and physical addresses of the memory device, and a second cache for storing indices associated with entries removed from the first cache. The memory device may include a controller configured to load mappings to the first cache upon receiving read commands. When the first cache is full, and when the memory device receives a read command, the controller may remove an entry from the first cache and may store an index associated with the removed entry to the second cache. The controller may then transmit a mapping associated with the index to a host device for use in a HPB operation.
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公开(公告)号：US11238940B1
公开(公告)日：2022-02-01
申请号：US16952880
申请日：2020-11-19
Applicant: Micron Technology, Inc.
Inventor： Antonino Pollio , Giuseppe Vito Portacci , Mauro Luigi Sali , Alessandro Magnavacca
Abstract: Methods, systems, and devices for initialization techniques for memory devices are described. A memory system may include a memory array on a first die and a controller on a second die, where the second die is coupled with the first die. The controller may perform an initialization procedure based on operating instructions stored within the memory system. For example, the controller may read a first set of operating instructions from read-only memory on the second die. The controller may obtain a second set of operating instructions stored at a memory block of the memory array on the first die, with the memory block indicated by the first set of operating instructions. The controller may complete or at least further the initialization procedure based on the second set of operating instructions.
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公开(公告)号：US20220004493A1
公开(公告)日：2022-01-06
申请号：US16918333
申请日：2020-07-01
Applicant: Micron Technology, Inc.
Inventor： Nicola Colella , Antonino Pollio
IPC: G06F12/02
Abstract: Methods, systems, and devices for data separation for garbage collection are described. A control component coupled to the memory array may identify a source block for a garbage collection procedure. In some cases, a first set of pages of the source block may be identified as a first type associated with a first access frequency and a second set of pages of the source block ay be identified as a second type associated with a second access frequency. Once the pages are identified as either the first type or the second type, the first set of pages may be transferred to a first destination block, and the second set of pages may be transferred to a second destination block as part of the garbage collection procedure.
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