A semiconductor device is disclosed. The semiconductor device may include an active pattern on a substrate, source/drain patterns on the active pattern, a fence spacer on side surfaces of each of the source/drain patterns, a channel pattern interposed between the source/drain patterns, a gate electrode crossing the channel pattern and extending in a first direction, and a gate spacer on a side surface of the gate electrode. A first thickness of an upper portion of the fence spacer in the first direction may be greater than a second thickness of the gate spacer in a second direction crossing the first direction.