Invention Publication
- Patent Title: SEMICONDUCTOR DEVICE
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Application No.: US18484956Application Date: 2023-10-11
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Publication No.: US20240178317A1Publication Date: 2024-05-30
- Inventor: Takahiro MORI
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Priority: JP 22187574 2022.11.24
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L27/088 ; H01L29/06 ; H01L29/10 ; H01L29/66

Abstract:
In a p-type substrate region of a semiconductor substrate, an n-type source region, an n-type drain region, a p-type body region having an impurity concentration higher than an impurity concentration of the p-type substrate region, a p-type body contact region having an impurity concentration higher than the impurity concentration of the p-type body region, and an n-type drift region having an impurity concentration lower than an impurity concentration of the n-type drain region are formed. A gate electrode is formed on the semiconductor substrate via a gate dielectric film. The semiconductor substrate includes a first region and a second region that are alternately disposed in an extending direction of the gate electrode. A width of the p-type body region overlapping with the gate electrode in the second region is smaller than a width of the p-type body region overlapping with the gate electrode in the first region.
Information query
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