Invention Publication
- Patent Title: IEC PROTECTION OF HIGH-FREQUENCY TERMINALS
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Application No.: US18070414Application Date: 2022-11-28
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Publication No.: US20240178663A1Publication Date: 2024-05-30
- Inventor: Kshitij YADAV , Vijayakumar DHANASEKARAN , Khaled Mahmoud ABDELFATTAH ALY , Ramkumar SIVAKUMAR , Dongyang TANG , Chienchung YANG
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Main IPC: H02H9/04
- IPC: H02H9/04

Abstract:
An ESD trigger circuit is provided for protecting a pass transistor coupled to an integrated circuit terminal. The integrated circuit terminal couples through a diode to a voltage node. In response to an electrostatic shock at the integrated circuit terminal, the diode conducts charge to the voltage node to pulse a voltage of the voltage node. The ESD trigger circuit responds to the pulse of the voltage by coupling the voltage node to a gate of the pass transistor.
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