A memory device includes an alternating stack of insulating layers and composite layers that alternate along a vertical direction, arrays of memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, and including a vertical semiconductor channel and a respective vertical stack of memory elements, and dielectric isolation structures laterally contacting each of the insulating layers and each of the composite layers. Each of the composite layers includes a combination of a dielectric connection plate and a plurality of electrically conductive layers that laterally extend along a first horizontal direction and that are laterally spaced apart along a second horizontal direction by backside trenches that laterally extend along the first horizontal direction.