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    THREE-DIMENSIONAL MEMORY DEVICE INCLUDING HAMMERHEAD-SHAPED WORD LINES AND METHODS OF MANUFACTURING THE SAME
    3.
    发明公开
    THREE-DIMENSIONAL MEMORY DEVICE INCLUDING HAMMERHEAD-SHAPED WORD LINES AND METHODS OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20230246085A1

    公开(公告)日：2023-08-03

    申请号：US17587518

    申请日：2022-01-28

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Tomohiro KUBO ,  Yuki - KASAI

    IPC: H01L29/423 ,  H01L21/28 ,  H01L27/11582

    CPC classification number: H01L29/4234 ,  H01L29/40117 ,  H01L27/11582

    Abstract: A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel, a memory film in contact with the vertical semiconductor channel, and a vertical stack of tubular dielectric spacers laterally surrounding the memory film. The tubular dielectric spacers may include tubular graded silicon oxynitride portions having a composition gradient such that an atomic concentration of nitrogen decreases with a lateral distance from an outer sidewall of the memory film, or may include tubular composite dielectric spacers including a respective tubular silicon oxide spacer and a respective tubular dielectric metal oxide spacer. Each of the electrically conductive layers has a hammerhead-shaped vertical cross-sectional profile.

    THREE-DIMENSIONAL MEMORY DEVICE WITH REDUCED ETCH DAMAGE TO MEMORY FILMS AND METHODS OF MAKING THE SAME
    4.
    发明申请
    THREE-DIMENSIONAL MEMORY DEVICE WITH REDUCED ETCH DAMAGE TO MEMORY FILMS AND METHODS OF MAKING THE SAME 审中-公开

    公开(公告)号：US20200006373A1

    公开(公告)日：2020-01-02

    申请号：US16019677

    申请日：2018-06-27

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Tomohiro KUBO ,  Koji MIYATA ,  Kota FUNAYAMA

    IPC: H01L27/11582 ,  H01L27/1157 ,  H01L27/11573 ,  H01L21/768

    Abstract: A first memory film and a sacrificial fill structure are formed within each first-tier memory opening through a first alternating stack of first insulating layers and first spacer material layers. A second alternating stack of second insulating layers and second spacer material layers is formed over the first alternating stack, and a second-tier memory opening is formed over each sacrificial fill structure. A second memory film is formed in each upper opening, and the sacrificial fill structures are removed from underneath the second-tier memory openings to form memory openings. A semiconductor channel is formed on each vertically neighboring pair of a first memory film and a second memory film as a continuous layer. The first memory film is protected by the sacrificial fill structure during formation of the second-tier memory openings.

    THREE-DIMENSIONAL MEMORY DEVICE WITH HIGH CONTACT VIA DENSITY AND METHODS OF FORMING THE SAME
    7.
    发明公开
    THREE-DIMENSIONAL MEMORY DEVICE WITH HIGH CONTACT VIA DENSITY AND METHODS OF FORMING THE SAME 审中-公开

    公开(公告)号：US20240006310A1

    公开(公告)日：2024-01-04

    申请号：US17810124

    申请日：2022-06-30

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Tomohiro KUBO ,  Hirofumi TOKITA ,  Shiqian SHAO ,  Fumiaki TOYAMA

    IPC: H01L23/528 ,  H01L27/11556 ,  H01L27/11582

    CPC classification number: H01L23/5283 ,  H01L27/11556 ,  H01L27/11582

    Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, a first three-dimensional memory array located in a first memory array region, and a second three-dimensional memory array located in a second memory array region that is laterally spaced from the first memory array region along a first horizontal direction by an inter-array region. The alternating stack is laterally bounded by two trench fill structures that are laterally spaced apart along a second horizontal direction by an inter-trench spacing. The inter-array region includes a stepped cavity having vertical steps of the alternating stack that laterally extend along different horizontal directions. Multiple rows of contact via structures may contact different electrically conductive layers in the stepped cavity. Alternatively or additionally, a top portion of the stepped cavity and a width of a bridge region of the electrically conductive layers in the inter-array region may have a variable lateral extent along the second horizontal direction.

    THREE-DIMENSIONAL MEMORY DEVICE CONTAINING LATERALLY-UNDULATING LATERAL ISOLATION TRENCHES AND METHODS OF FORMING THE SAME
    10.
    发明公开
    THREE-DIMENSIONAL MEMORY DEVICE CONTAINING LATERALLY-UNDULATING LATERAL ISOLATION TRENCHES AND METHODS OF FORMING THE SAME 审中-公开

    公开(公告)号：US20240064983A1

    公开(公告)日：2024-02-22

    申请号：US18495491

    申请日：2023-10-26

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Takashi KASHIMURA ,  Tomohiro KUBO ,  Johann ALSMEIER

    IPC: H10B43/27 ,  H10B41/27

    CPC classification number: H10B43/27 ,  H10B41/27

    Abstract: A three-dimensional memory device includes alternating stacks of insulating layers and electrically conductive layers that laterally extending along a first horizontal direction, and laterally spaced apart along a second horizontal direction by lateral isolation trenches, memory stack structures vertically extending through a respective one of the alternating stacks; and isolation trench fill structures located in the lateral isolation trenches. At least one of the isolation trench fill structures includes a first lengthwise sidewall and a second lengthwise sidewall. The first lengthwise sidewall has a first periodic lateral undulation with a uniform pitch along the first horizontal direction. The second lengthwise sidewall has a second periodic lateral undulation with the uniform pitch along the first horizontal direction.

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