Invention Publication
- Patent Title: SEMICONDUCTOR DEVICE HAVING SEMICONDUCTOR REGIONS IN EPITAXIAL DRIFT LAYER
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Application No.: US18592332Application Date: 2024-02-29
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Publication No.: US20240204098A1Publication Date: 2024-06-20
- Inventor: Atsushi SAKAI , Katsumi EIKYU , Satoshi EGUCHI , Nobuo MACHIDA , Koichi ARAI , Yasuhiro OKAMOTO , Kenichi HISADA , Yasunori YAMASHITA
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Priority: JP 17251068 2017.12.27
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/08 ; H01L29/16 ; H01L29/423 ; H01L29/66

Abstract:
To improve characteristics of a semiconductor device. A first p-type semiconductor region having an impurity of a conductivity type opposite from that of a drift layer is arranged in the drift layer below a trench, and a second p-type semiconductor region is further arranged that is spaced at a distance from a region where the trench is formed as seen from above and that has the impurity of the conductivity type opposite from that of the drift layer. The second p-type semiconductor region is configured by a plurality of regions arranged at a space in a Y direction (depth direction in the drawings). Thus, it is possible to reduce the specific on-resistance while maintaining the breakdown voltage of the gate insulating film by providing the first and second p-type semiconductor regions and further by arranging the second p-type semiconductor region spaced by the space.
Information query
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