A semiconductor memory device including a substrate including a cell area and a peripheral area around the cell area, a cell area isolation film in the substrate and defining the cell area, a bit-line structure in the cell area, a peripheral gate structure in the peripheral area of the substrate, the peripheral gate structure including a peripheral gate conductive film, a peripheral spacer on a sidewall of the peripheral gate structure, an etch stop film on the peripheral spacer and spaced apart from the peripheral gate structure, a first peripheral insulating film around the peripheral gate structure on the substrate, and a peripheral interlayer insulating film covering the peripheral gate structure, the first peripheral insulating film, and the peripheral spacer, the peripheral interlayer insulating film including a material different from a material of the first peripheral insulating film, may be provided.