公开(公告)号：US20250071980A1

公开(公告)日：2025-02-27

申请号：US18755088

申请日：2024-06-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wonyoung JEONG ,  Choonghyun LEE ,  Jooncheol KIM ,  Sunyoung LEE ,  Youngseung CHO

IPC: H10B12/00

Abstract: A semiconductor device may include a substrate including, lower bit line structures from a first region to a second region adjacent to the first region and extending in a second direction perpendicular to the first direction, a second gate structure on the second region of the substrate to be spaced apart from the lower bit line structure, a first offset spacer on a first sidewall corresponding to an end of each of the lower bit line structures in the second direction, a second offset spacer and a first spacer sequentially arranged on a sidewall of the second gate structure, an insulation liner layer at least disposed a surface of the first offset spacer, and a capping pattern covering the lower bit line structures and an upper portion of the second gate structure. The first offset spacer and the insulation liner layer include silicon nitride.

公开(公告)号：US20250016990A1

公开(公告)日：2025-01-09

申请号：US18656670

申请日：2024-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Choonghyun LEE ,  Kanguk KIM ,  Jooncheol KIM ,  Jina KIM

IPC: H10B12/00

Abstract: A semiconductor device is provided. The semiconductor device includes a first bit line crossing a memory cell array region in a first direction and extending into an extension region adjacent to the memory cell array region, a second bit line crossing the memory cell array region in the first direction and extending into the extension region, and adjacent to the first bit line, an insulating pattern within the extension region and contacting an end portion of the second bit line in the first direction, and an insulating spacer within the extension region and contacting an end portion of the first bit line in the first direction, the insulating spacer being different from the insulating pattern.

公开(公告)号：US20240324190A1

公开(公告)日：2024-09-26

申请号：US18611146

申请日：2024-03-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunho SONG ,  Jooncheol KIM ,  Bosu KIM ,  Yeji KIM ,  Subin SON ,  Hyundon YUN ,  Namkyeong LEE

IPC: H10B12/00

CPC classification number: H10B12/50 ,  H10B12/482

Abstract: An integrated circuit device includes a substrate including a cell array area and a peripheral circuit area next to the cell array area, an isolation layer defining an activation region of the substrate in the peripheral circuit area, the isolation layer including a first insulation pattern and a second insulation pattern surrounding the first insulation pattern, and a gate structure on the substrate in the peripheral circuit area, wherein the second insulation pattern includes one or more surfaces defining a recess into an upper surface of the substrate in a vertical direction, the vertical direction extending perpendicular to the upper surface of the substrate.

公开(公告)号：US20240224501A1

公开(公告)日：2024-07-04

申请号：US18483693

申请日：2023-10-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jooncheol KIM ,  Kang-Uk KIM

IPC: H10B12/00

CPC classification number: H10B12/315 ,  H10B12/482

Abstract: A semiconductor memory device including a substrate including a cell area and a peripheral area around the cell area, a cell area isolation film in the substrate and defining the cell area, a bit-line structure in the cell area, a peripheral gate structure in the peripheral area of the substrate, the peripheral gate structure including a peripheral gate conductive film, a peripheral spacer on a sidewall of the peripheral gate structure, an etch stop film on the peripheral spacer and spaced apart from the peripheral gate structure, a first peripheral insulating film around the peripheral gate structure on the substrate, and a peripheral interlayer insulating film covering the peripheral gate structure, the first peripheral insulating film, and the peripheral spacer, the peripheral interlayer insulating film including a material different from a material of the first peripheral insulating film, may be provided.