- 专利标题: CHOPLESS FLOW FOR STAIRLESS ELECTRICAL INTERCONNECT STRUCTURE
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申请号: US18420074申请日: 2024-01-23
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公开(公告)号: US20240250024A1公开(公告)日: 2024-07-25
- 发明人: Surendranath C. Eruvuru , Lifang Xu
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 主分类号: H01L23/528
- IPC分类号: H01L23/528 ; G11C16/04 ; H10B41/10 ; H10B41/20 ; H10B41/35 ; H10B43/10 ; H10B43/20 ; H10B43/35
摘要:
A stairless electrical interconnect structure with contact pillars embedded within and collectively accessing each tier in a periodic material stack, e.g., to provide electrical connections to access lines associated with a three-dimensional memory array, is described. The contact pillars can be formed in a corresponding array of vertical contact pillar trenches etched into the material stack in two stages to create depths of the trenches that vary between columns by a fixed number of tiers and then offset the depths between rows.
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