Invention Publication
- Patent Title: SYSTEM FOR ESTIMATING POWER DISSIPATION AND/OR EFFICIENCY
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Application No.: US18533477Application Date: 2023-12-08
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Publication No.: US20240288477A1Publication Date: 2024-08-29
- Inventor: Alastair M. BOOMER , John B. BOWLERWELL , Malcolm BLYTH , Eric J. KING
- Applicant: Cirrus Logic International Semiconductor Ltd.
- Applicant Address: GB Edinburgh
- Assignee: Cirrus Logic International Semiconductor Ltd.
- Current Assignee: Cirrus Logic International Semiconductor Ltd.
- Current Assignee Address: GB Edinburgh
- Priority: GB 02722.0 2023.02.24
- Main IPC: G01R21/06
- IPC: G01R21/06 ; G01R31/28 ; H02H7/20

Abstract:
A system for estimating power dissipation in an integrated circuit comprising a power converter and an amplifier, the system comprising processing circuitry configured to: receive a signal indicative of an output voltage to a load which, in use of the integrated circuit, is driven by the amplifier; receive a signal indicative of an output current to the load; determine an output power value based on the received signal indicative of the output voltage to the load and the received signal indicative of the output current to the load; receive a signal indicative of an input voltage to the power converter; receive a signal indicative of an average current input to the power converter; determine an input power value based on the received signal indicative of the input voltage to the power converter and the received signal indicative of the average current input to the power converter; and determine a power dissipation value based on the determined output power value and the determined input power value.
Information query