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公开(公告)号：US20240012035A1
公开(公告)日：2024-01-11
申请号：US18347715
申请日：2023-07-06
Inventor： Kapil R. SHARMA , Kathryn R. HOLLAND , Matthew PETHERBRIDGE , Peter HSU , John B. BOWLERWELL
IPC: G01R19/00
CPC classification number: G01R19/0092
Abstract: This application relates to methods and apparatus for sensing current in a monitored current path, where the monitored current path is bidirectional such that current can flow in either direction along the monitored current path. A current sensor has first and second sense resistors (401a, 401b) configured to each pass a current corresponding to the current in the monitored current path. The first and second sense resistors are configured to have a matching arrangement, such that current flow through the first sense resistor when current is flowing in one direction in the monitored current path matches current flow through the second sense resistor when current is flowing in the opposite direction in the monitored current path.
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公开(公告)号：US20210399691A1
公开(公告)日：2021-12-23
申请号：US17346767
申请日：2021-06-14
Inventor： Pradeep SAMINATHAN , Graeme S. ANGUS , John B. BOWLERWELL
Abstract: The present invention relates to circuitry comprising: interpolation filter circuitry configured to receive a digital input signal and to output an interpolated digital signal; amplifier circuitry configured to generate an output signal based on the interpolated digital signal; and protection circuitry. The protection circuitry is configured to activate in response to detection of a fault condition at an output of the amplifier circuitry. The circuitry further comprises first detection circuitry configured to output a control signal to disable the protection circuitry on detection of a transient signal at an output of the interpolation filter circuitry that is unrelated to a fault.
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公开(公告)号：US20230299575A1
公开(公告)日：2023-09-21
申请号：US18183817
申请日：2023-03-14
Inventor： David P. SINGLETON , Andrew J. HOWLETT , Sharjeel RIAZ , John B. BOWLERWELL
CPC classification number: H02H7/20 , H02H1/0007
Abstract: An integrated circuit (IC), comprising: a converter comprising: one or more core devices; and one or more output internal nodes, each internal node coupled to one of the one or more core devices; protection circuitry comprising: one or more isolation switches, each of the one or more isolation switches coupled between a respective one of the one or more internal output nodes and a respective output external pin of the IC, wherein the protection circuitry configured to: monitor a characteristic at each respective external output pin of the IC; and if the characteristic is outside an operating specification of the one or more core devices, open one or more of the one or more isolation switches to isolate one or more of the one or more core devices from the respective external pin of the IC.
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公开(公告)号：US20210351753A1
公开(公告)日：2021-11-11
申请号：US17233811
申请日：2021-04-19
Inventor： John B. BOWLERWELL , Andrew J. HOWLETT , Saurabh SINGH , Andrew BUIST
Abstract: The present disclosure relates to circuitry for providing an output voltage. The circuitry comprises: voltage generator circuitry configured to provide an output voltage to an output node of the circuitry; current limiter circuitry operable to perform current limiting so as to limit a current supplied at the output node of the circuitry; detection circuitry configured to output a detection signal when a load voltage across a load coupled to the output node of the circuitry reaches a target voltage; and delay circuitry configured to receive the detection signal and to output a control signal to deactivate current limiting by the current limiter circuitry after a predetermined delay period after receiving the detection signal.
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公开(公告)号：US20210242847A1
公开(公告)日：2021-08-05
申请号：US17142904
申请日：2021-01-06
Inventor： David P. SINGLETON , Andrew J. HOWLETT , John B. BOWLERWELL
IPC: H03F3/45
Abstract: The present disclosure relates to circuitry comprising audio amplifier circuitry for receiving an audio signal to be amplified; and first and second output nodes for outputting first and second differential output signals. The circuitry further comprises common mode buffer circuitry configured to receive a common mode voltage and to selectively output the common mode voltage to the first and second output nodes.
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Patent Agency Ranking
公开(公告)号：US20210165055A1
公开(公告)日：2021-06-03
申请号：US16951775
申请日：2020-11-18
Inventor： John A. BRESLIN , John B. BOWLERWELL , Clive R. GRAHAM
Abstract: The present disclosure relates to circuitry for detecting connection of a plug of an audio accessory device to a socket of an intermediate cable that is connected to a host device, wherein the plug of the accessory device is of a different type than the socket of the intermediate cable. The circuitry comprises a monitoring unit comprising a first terminal configured to be electrically connected to a first socket contact of the socket that is in electrical contact with a first plug contact of the plug when the plug is fully received in the socket; and a second terminal configured to be electrically connected to a second socket contact of the socket that is in electrical contact with a second plug contact of the plug when the plug is fully received in the socket. The monitoring unit is configured to: detect a first impedance of a first signal path from the first terminal; detect a second impedance of a second signal path from the first terminal; and detect a third impedance of a third signal path from the second terminal, wherein the circuitry is configured to output a signal indicative of detection of connection of the plug to the socket in response to detection by the monitoring unit that the detected first, second and third impedances do not correspond to expected first, second and third impedances.
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公开(公告)号：US20250070671A1
公开(公告)日：2025-02-27
申请号：US18946316
申请日：2024-11-13
Inventor： Malcolm BLYTH , John B. BOWLERWELL , Alastair M. BOOMER , Holger HAIPLIK
Abstract: Current detection circuitry for generating an average inductor current signal indicative of an average inductor current during an operational cycle of power converter circuitry, the current detection circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during the operational cycle; and circuitry for applying a ripple current estimate signal, indicative of an estimate of half of a ripple current in the power converter circuitry, to the peak inductor current signal to generate the average inductor current signal, wherein the ripple current is equal to a difference between the average inductor current and the peak inductor current.
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公开(公告)号：US20240429821A1
公开(公告)日：2024-12-26
申请号：US18698674
申请日：2022-11-29
Inventor： Malcolm BLYTH , John B. BOWLERWELL , Alastair M. BOOMER , Holger HAIPLIK
Abstract: Current detection circuitry for generating an average inductor current signal indicative of an average inductor current during an operational cycle of power converter circuitry, the current detection circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during the operational cycle; and circuitry for applying a ripple current estimate signal, indicative of an estimate of half of a ripple current in the power converter circuitry, to the peak inductor current signal to generate the average inductor current signal, wherein the ripple current is equal to a difference between the average inductor current and the peak inductor current.
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公开(公告)号：US20240154612A1
公开(公告)日：2024-05-09
申请号：US18483727
申请日：2023-10-10
Inventor： Kapil SHARMA , Andrew J. HOWLETT , Matthew PETHERBRIDGE , John B. BOWLERWELL , Graeme S. ANGUS , Gordon RUSSELL
IPC: H03K17/687
CPC classification number: H03K17/6871
Abstract: The application relates to voltage supply in switched-mode driver integrated circuit (IC). The IC has an output bridge with first and second circuit branches, where each of the circuit branches has an output node (102a, 102b) connected between first and second transistor switches (103a, 104a; 103b, 104b) for selectively connecting the output node to respective first and second voltages (VH, VL). There are discrete first and second IC die contacts (208a, 208b) for receiving the first voltage, and the first and second circuit branches are connected to the first and second IC die contacts respectively. Ancillary circuitry (105) is configured to receive a supply voltage from a voltage supply node voltage which is connected to the first and second IC die contacts via respective first and second respectively matched resistances.
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公开(公告)号：US20230344351A1
公开(公告)日：2023-10-26
申请号：US18299969
申请日：2023-04-13
Inventor： Alastair M. BOOMER , John B. BOWLERWELL , James MUNGER , Andrew J. HOWLETT
CPC classification number: H02M3/1582 , H02M1/0009 , H02M1/0019
Abstract: The present disclosure relates to power converter circuitry, and in particular to power converter circuitry for providing a supply voltage to a load such as amplifier circuitry. In one aspect the invention provides a system comprising: amplifier circuitry; and power converter circuitry for receiving a supply voltage and providing an output voltage to the amplifier circuitry, the power converter circuitry comprising: a control loop for regulating an output voltage of the power converter circuitry in accordance with a target output voltage value; and controller circuitry configured to adjust the target output voltage value if the supply voltage to the power converter circuitry is within a first predefined threshold of a requested output voltage of the power converter circuitry.
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