- 专利标题: LOW-ENERGY UNDERLAYER FOR ROOM TEMPERATURE PHYSICAL VAPOR DEPOSITION OF ELECTRICALLY CONDUCTIVE FEATURES
-
申请号: US18309669申请日: 2023-04-28
-
公开(公告)号: US20240363407A1公开(公告)日: 2024-10-31
- 发明人: Jie ZHANG , Liqi WU , Cory LAFOLLETT , Tsung-Han YANG , Wei WENG , Qihao ZHU , Jiang LU , Rongjun WANG , Xianmin TANG
- 申请人: Applied Materials, Inc.
- 申请人地址: US CA Santa Clara
- 专利权人: Applied Materials, Inc.
- 当前专利权人: Applied Materials, Inc.
- 当前专利权人地址: US CA Santa Clara
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L21/02
摘要:
Embodiments of the present disclosure generally relate to a method for forming an electrically conductive feature on a substrate. In one embodiment, the method includes forming a first conductive layer via physical vapor deposition (PVD) in an opening of a substrate. The first conductive layer has a thickness of less than 20 angstroms. The method further includes forming a second conductive layer via PVD on the first conductive layer. The first conductive layer and the second conductive layer are formed at a temperature of less than 50° C. The method further includes annealing at least a portion of the first conductive layer and the second conductive layer.
信息查询
IPC分类: