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公开(公告)号:US20250054767A1
公开(公告)日:2025-02-13
申请号:US18646055
申请日:2024-04-25
Applicant: Applied Materials, Inc.
Inventor: Qihao ZHU , Shumao ZHANG , Weifeng YE , Yiyang WAN , Gary HOW , Jianqiu GUO , Dong WANG , Shihchung CHEN , Liqi WU , Jiang LU
IPC: H01L21/285 , C23C16/02 , C23C16/04 , C23C16/14 , C23C16/42 , C23C16/455 , C23C16/50 , C23C16/52 , H01J37/32 , H01L21/02 , H01L21/768
Abstract: Embodiments include a method of forming a contact structure on a semiconductor substrate. The method including selectively depositing a metal silicide layer over a contact formed within a cavity of a substrate and a bottom surface of the cavity using a selective deposition process, including forming a residual layer on a surface of a dielectric layer forming sidewalls of the cavity, wherein a thickness of the metal silicide layer deposited over the contact is greater than a thickness of the residual layer, removing at least a portion of the residual layer formed on the dielectric layer using an etching process that comprises exposing the metal selectively deposited layer to a metal halide containing precursor, and selectively depositing a metal fill over the metal silicide layer remaining over the contact after removing the at least the portion of the residual layer using a selective metal fill process.
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2.
公开(公告)号:US20240363407A1
公开(公告)日:2024-10-31
申请号:US18309669
申请日:2023-04-28
Applicant: Applied Materials, Inc.
Inventor: Jie ZHANG , Liqi WU , Cory LAFOLLETT , Tsung-Han YANG , Wei WENG , Qihao ZHU , Jiang LU , Rongjun WANG , Xianmin TANG
IPC: H01L21/768 , H01L21/02
CPC classification number: H01L21/76877 , H01L21/02274 , H01L21/76843 , H01L21/76865 , H01L21/76883
Abstract: Embodiments of the present disclosure generally relate to a method for forming an electrically conductive feature on a substrate. In one embodiment, the method includes forming a first conductive layer via physical vapor deposition (PVD) in an opening of a substrate. The first conductive layer has a thickness of less than 20 angstroms. The method further includes forming a second conductive layer via PVD on the first conductive layer. The first conductive layer and the second conductive layer are formed at a temperature of less than 50° C. The method further includes annealing at least a portion of the first conductive layer and the second conductive layer.
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公开(公告)号:US20240379768A1
公开(公告)日:2024-11-14
申请号:US18196833
申请日:2023-05-12
Applicant: Applied Materials, Inc.
Inventor: Shumao ZHANG , Le ZHANG , Weifeng YE , Chih-Hsun HSU , David T. OR , Gary HOW , Yiyang WAN , Liqi WU , Jiang LU
IPC: H01L29/40 , H01L21/02 , H01L21/768
Abstract: Embodiments of the disclosure include a method of forming contact structure on a semiconductor substrate. The method includes treating a native oxide layer formed on a contact junction, wherein treating the native oxide layer forms a silica salt layer on the contact junction disposed within a contact feature that includes one or more surfaces that comprise silicon nitride. Then exposing the silica salt layer and the one or more surfaces to a plasma comprising oxygen, wherein the plasma forms a silicon oxynitride material on the one or more surfaces. Then removing the second silica salt layer, selectively forming a metal silicide layer on the contact junction, and then filling the contact feature with a metal, wherein filling the feature comprises selectively depositing a metal layer over the selectively formed metal silicide layer.
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公开(公告)号:US20230343644A1
公开(公告)日:2023-10-26
申请号:US18070383
申请日:2022-11-28
Applicant: Applied Materials, Inc.
Inventor: Chih-Hsun HSU , Shiyu YUE , Jiang LU , Rongjun WANG , Xianmin TANG , Zhenjiang CUI , Chi Hong CHING , Meng-Shan WU , Chun-chieh WANG , Wei LEI , Yu LEI
IPC: H01L21/768 , H01L21/67 , H01L23/532
CPC classification number: H01L21/76877 , H01L21/67063 , H01L21/6719 , H01L21/76843 , H01L21/76871 , H01L23/53266
Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed in a first process chamber to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process is performed in the first process chamber removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
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公开(公告)号:US20230343643A1
公开(公告)日:2023-10-26
申请号:US17868475
申请日:2022-07-19
Applicant: Applied Materials, Inc.
Inventor: Chih-Hsun HSU , Shiyu YUE , Wei LEI , Yi XU , Jiang LU , Yu LEI , Ziye XIONG , Tsung-Han YANG , Zhimin QI , Aixi ZHANG , Jie ZHANG , Liqi WU , Rongjun WANG , Shihchung CHEN , Meng-Shan WU , Chun-Chieh WANG , Annamalai LAKSHMANAN , Yixiong YANG , Xianmin TANG
IPC: H01L21/768 , H01L23/522
CPC classification number: H01L21/76877 , H01L21/76876 , H01L21/76843 , H01L21/76865 , H01L23/5226 , H01L21/76826
Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
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公开(公告)号:US20170306488A1
公开(公告)日:2017-10-26
申请号:US15465526
申请日:2017-03-21
Applicant: APPLIED MATERIALS, INC.
Inventor: Daping YAO , Hyman W.H. LAM , Jiang LU , Dien-Yeh WU , Can XU , Paul F. MA , Mei CHANG
IPC: C23C16/458 , C23C16/455
CPC classification number: C23C16/458 , C23C16/4404 , C23C16/455 , C23C16/45512
Abstract: A gas feedthrough assembly and processing apparatus using the same are disclosed herein. In some embodiments, the gas feedthrough assembly, includes a dielectric body; at least one channel extending through the dielectric body; and a dielectric tube disposed within the at least one channel, wherein an inner diameter of the at least one channel is greater than an outer diameter of the dielectric tube such that a gap is formed between an outer wall of the dielectric tube and an inner wall of the at least one channel.
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公开(公告)号:US20240379363A1
公开(公告)日:2024-11-14
申请号:US18582977
申请日:2024-02-21
Applicant: Applied Materials, Inc.
Inventor: Jianqiu GUO , Dong WANG , Shumao ZHANG , Liqi WU , ShihChung CHEN , Jiang LU
IPC: H01L21/28
Abstract: Methods are provided. In some embodiments, a method of forming a contact structure on a semiconductor substrate includes disposing a selective metal silicide layer on a surface of a contact structure by maintaining a first temperature of a substrate and providing a first carrier gas, a first metal-containing precursor, and a first hydrogen-containing precursor to a first deposition chamber. The method includes disposing a partially selective metal layer on a surface of the selective metal silicide layer and one or more surfaces of a cavity by maintaining a second temperature of the substrate and providing a second carrier gas, a second metal-containing precursor, and a reducing agent to the first deposition chamber or a second deposition chamber. The second metal-containing precursor and the reducing agent are introduced to the first deposition chamber or the second deposition chamber at a chamber pressure of about 50 T to about 150 T.
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8.
公开(公告)号:US20240191354A1
公开(公告)日:2024-06-13
申请号:US18078841
申请日:2022-12-09
Applicant: Applied Materials, Inc.
Inventor: Ying-Bing JIANG , Joung Joo LEE , Xianmin TANG , Jiang LU , Avgerinos V. GELATOS , Dien-yeh WU , Weifeng YE , Yiyang WAN , Gary HOW , Joseph HERNANDEZ
IPC: C23C16/455 , C23C16/42 , C23C16/505 , H01J37/32
CPC classification number: C23C16/45536 , C23C16/42 , C23C16/45553 , C23C16/45565 , C23C16/505 , H01J37/321 , H01J2237/3321
Abstract: Methods of depositing a metal silicide on a substrate are provided herein. In some embodiments, a method of depositing a metal silicide on a substrate having a silicon containing surface includes: creating a plasma comprising a first gas in a plasma region in a chemical vapor deposition (CVD) chamber, wherein the plasma region is disposed between a lid heater and a showerhead; flowing the first gas through a plurality of first openings of the showerhead to an activation region in the CVD chamber disposed between the showerhead and the substrate; flowing a second gas comprising a metal precursor in a non-plasma state through a plurality of second openings of the showerhead to the activation region, wherein the plurality of second openings are fluidly independent from the plurality of first openings within the showerhead; mixing the first gas with the second gas to activate the second gas in the activation region; and exposing the silicon containing surface of the substrate to the activated second gas.
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公开(公告)号:US20230420295A1
公开(公告)日:2023-12-28
申请号:US18133102
申请日:2023-04-11
Applicant: Applied Materials, Inc.
Inventor: Tsung-Han YANG , Xingyao GAO , Shiyu YUE , Chih-Hsun HSU , Shirish PETHE , Rongjun WANG , Yi XU , Wei LEI , Yu LEI , Aixi ZHANG , Xianyuan ZHAO , Zhimin QI , Jiang LU , Xianmin TANG
IPC: H01L21/768 , H01L21/285 , H01J37/32
CPC classification number: H01L21/76877 , H01L21/76876 , H01L21/76865 , H01L21/2855 , H01J2237/338 , H01L21/76856 , H01L21/76861 , H01J37/32899 , H01L21/76843
Abstract: A method and apparatus for tungsten gap-fill in semiconductor devices are provided. The method includes performing a gradient oxidation process to oxidize exposed portions of a liner layer, wherein the gradient oxidation process preferentially oxidizes an overhang portion of the liner layer, which obstructs or blocks top openings of one or more features formed within a field region of a substrate. The method further includes performing an etchback process to remove or reduce the oxidized overhang portion of the liner layer, exposing the liner layer to a chemical vapor transport (CVT) process to remove metal oxide remaining from the gradient oxidation process and the etchback process, and performing a tungsten gap-fill process to fill or partially fill the one or more features.
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公开(公告)号:US20150255333A1
公开(公告)日:2015-09-10
申请号:US14717375
申请日:2015-05-20
Applicant: APPLIED MATERIALS, INC.
Inventor: Jiang LU , Hyoung-Chan HA , Paul F. MA , Seshadri GANGULI , Joseph F. AUBUCHON , Sang-ho YU , Murali K. NARASIMHAN
IPC: H01L21/768 , H01L21/285
CPC classification number: H01L21/76871 , C23C16/16 , C23C16/18 , C23C16/42 , C23C16/56 , H01L21/28556 , H01L21/28562 , H01L21/28568 , H01L21/76846 , H01L21/76862 , H01L21/76864 , H01L21/76873
Abstract: Embodiments of the invention provide processes for depositing a cobalt layer on a barrier layer and subsequently depositing a conductive material, such as copper or a copper alloy, thereon. In one embodiment, a method for depositing materials on a substrate surface is provided which includes forming a barrier layer on a substrate, exposing the substrate to dicobalt hexacarbonyl butylacetylene (CCTBA) and hydrogen to form a cobalt layer on the barrier layer during a vapor deposition process (e.g., CVD or ALD), and depositing a conductive material over the cobalt layer. In some examples, the barrier layer and/or the cobalt layer may be exposed to a gas or a reagent during a treatment process, such as a thermal process, an in situ plasma process, or a remote plasma process.
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