Invention Application
- Patent Title: SEMICONDUCTOR DEVICES WITH THRESHOLD VOLTAGE MODULATION LAYER
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Application No.: US18788409Application Date: 2024-07-30
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Publication No.: US20240397694A1Publication Date: 2024-11-28
- Inventor: Shih-Hao Lin , Chih-Hsiang Huang , Shang-Rong Li , Chih-Chuan Yang , Jui-Lin Chen , Ming-Shuan Li
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: H10B10/00
- IPC: H10B10/00 ; H01L21/02 ; H01L21/28 ; H01L21/8238 ; H01L29/06 ; H01L29/423 ; H01L29/49 ; H01L29/66 ; H01L29/786

Abstract:
A semiconductor structure includes a substrate, first channel layers vertically stacked over the substrate in a first region, and second channel layers vertically stacked over the substrate in a second region. The first and second regions have opposite conductivity types. The semiconductor structure also includes a threshold voltage (Vt) modulation layer wrapping around each of the second channel layers in the second region. The first region is free of the Vt modulation layer. The semiconductor structure also includes a gate dielectric layer wrapping around each of the first channel layers and the second channel layers over the Vt modulation layer, and a work function metal layer disposed on the gate dielectric layer and wrapping around each of the first channel layers and the second channel layers.
Information query