An apparatus and method for efficiently managing memory bandwidth within a communication fabric. A computing system includes multiple clients, a display controller, and a communication fabric that transfers data between the multiple clients, the display controller, and a memory subsystem. A control circuit with power management circuitry determines that one or more conditions are satisfied for changing a power-performance state (P-state) of the memory subsystem. The control circuit asserts indications on a sideband interface specifying to the communication fabric that the display controller is to have an increased bandwidth of data transfer between the display controller and the memory subsystem. Using the increased bandwidth provided by the communication fabric, the display controller prefetches display data from a frame buffer of the memory subsystem prior to the P-state change. Afterward, the memory subsystem performs the P-state change and the corresponding training of the memory interface.