The invention relates to a pseudo-random binary sequence error counter. The error counter includes a multi-stage shift register and a logic gating circuit for comparing the signals at the outputs of predetermined stages of the shift register. The output of the first logic gating means, which during normal operation corresponds to the correct binary sequence, is compared in a second logic gating means with the incoming sequence and errors in the incoming sequence are detected and counted. Errors in the incoming signal are corrected in a further logic gating means whose output is fed into a serial input terminal of the shift register.