A semiconductor device comprises a P type semiconductor substrate; an N type layer buried in the P type substrate; and an N type isolating region extending from the surface of the P type substrate to the N type buried region to provide a P type isolated region in the P type substrate. In the P type isolated region marked off by the N type isolating region is formed a first N type region so as not to contact the N type isolating region and buried region and a P type second region is diffused in the first N type region. A logic circuit is constituted by a first vertical PNP transistor formed of the P type second region, first N type region and P type isolated region and a second vertical NPN transistor formed of the first N type region, P type isolated region and N type buried region.