发明授权
US4354217A Automatic power disconnect system for wafer scale integrated circuits
失效
用于晶圆级集成电路的自动断电系统
- 专利标题： Automatic power disconnect system for wafer scale integrated circuits
- 专利标题（中）： 用于晶圆级集成电路的自动断电系统
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申请号： US166477申请日： 1980-07-07
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公开(公告)号： US4354217A公开(公告)日： 1982-10-12
- 发明人: Michael J. Mahon
- 申请人： Michael J. Mahon
- 申请人地址： MI Detroit
- 专利权人： Burroughs Corporation
- 当前专利权人： Burroughs Corporation
- 当前专利权人地址： MI Detroit
- 主分类号： G06F11/20
- IPC分类号： G06F11/20 ; H01L23/525 ; H02H5/04
摘要：
This disclosure relates to a wafer scale power interconnect system by which defective circuits on the wafer can be automatically disconnected from the power and ground lines supplied to each of the circuits. The disconnect device employs a gate between the power source and the circuit, which gate is controlled by a fuse that can be destroyed by an excessive current thereby opening the gate. The disconnect device may also be just such a fuse or a current limiter.
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