发明授权
US4489340A PNPN Light sensitive semiconductor switch with phototransistor connected
across inner base regions
失效
PNPN光敏半导体开关,光电晶体管连接在内部基极区域
- 专利标题: PNPN Light sensitive semiconductor switch with phototransistor connected across inner base regions
- 专利标题(中): PNPN光敏半导体开关,光电晶体管连接在内部基极区域
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申请号: US228935申请日: 1981-01-28
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公开(公告)号: US4489340A公开(公告)日: 1984-12-18
- 发明人: Jun Ueda , Haruo Mori , Kazuo Hagimura , Hirokazu Tsukada , Kotaro Kato
- 申请人: Jun Ueda , Haruo Mori , Kazuo Hagimura , Hirokazu Tsukada , Kotaro Kato
- 申请人地址: JPX Tokyo JPX Tokyo
- 专利权人: Nippon Telegraph & Telephone Public Corporation,Oki Electric Industry Co., Ltd.
- 当前专利权人: Nippon Telegraph & Telephone Public Corporation,Oki Electric Industry Co., Ltd.
- 当前专利权人地址: JPX Tokyo JPX Tokyo
- 优先权: JPX55-11472 19800204; JPX55-11473 19800204
- 主分类号: H01L27/144
- IPC分类号: H01L27/144 ; H01L31/111 ; H04Q3/52 ; H01L29/74
摘要:
A PNPN semiconductor switch including an N type semiconductor substrate, spaced apart first and second P type diffused regions formed on a surface of an N type substrate, spaced apart first and second N type diffused regions formed in the second P type diffused region, a first gate insulating layer formed on the surface of the second P type diffused region between the first and second N type diffused regions to cover portions thereof, a first gate electrode formed on the first gate insulating layer between the first and second N type diffused regions, a resistance region disposed on the first gate insulating layer, one end of the resistance region on the side opposite to the first gate electrode, a second gate insulating layer overlying the first gate electrode and the resistance region, a semiinsulating layer formed on the surface of the substrate except over the first and second P type diffused regions, an insulating layer overlying the semiinsulating layer, a P gate electrode electrically connected to the second P type diffused region and the second N type diffused region, a second gate electrode formed on the second gate insulating layer at a portion above the first gate electrode, a cathode electrode connected to the first N type diffused region, an anode electrode connected to the first P type diffused region and the second gate electrode and a high resistance region formed immediately beneath the first gate insulating layer and between the first and second N type diffused regions.
公开/授权文献
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